Power amplifier

ABSTRACT

In a power amplifier driven by a pulse width modulation (PWM) signal, a first pair of drive pulses opposite in level to each other is formed from a first pulse width modulation signal whose quantization level corresponds to its pulse width and supplied to a first push-pull circuit ( 15 ). A second pair of drive pulses opposite in level to each other is formed from a second pulse width modulation signal whose two&#39;s complement of quantization level corresponds to its pulse width, and supplied to a second push-pull circuit ( 16 ). A speaker ( 19 ) is connected between the first and second push-pull circuits ( 15  and  16 ). A deviation between potentials at the output terminals of the first and second push-pull circuits ( 15  and  16 ), respectively, is detected. When a deviation is detected, the push-pull circuits are substantially stopped from operating.

TECHNICAL FIELD

The present invention relates to a pulse width modulation (PWM)signal-driven power amplifier.

This application claims the priority of the Japanese Patent ApplicationNo. 2002-209557 filed on Jul. 18, 2002, the entirety of which isincorporated by reference herein.

BACKGROUND ART

Conventionally, there is available a digital amplifier called “D-classamplifier” as an audio power amplifier. The D-class amplifier amplifiesa power by switching, and it is constructed as shown in FIG. 1 forexample.

In the power amplifier shown in FIG. 1, digital audio signal Pin issupplied to a PWM circuit 11 via an input terminal Tin, and clock signalhaving a predetermined frequency is supplied from a clock generator 12to the PWM circuit 11. The digital audio signal Pin supplied to the PWMcircuit 11 is converted into a pair of PWM signals PA and PB.

As shown in FIGS. 2A and 2B, the pulse width of the PWM signals PA andPB, or a time duration for which the waveform of each PWM signal keeps“H” level, varies correspondingly to a quantization level the digitalaudio signal Pin takes (corresponding to a momentary level of the signalPin when the signal is converted from digital to analog). The pulsewidth of one of the PWM signal PA corresponds to the magnitude of thequantization level the digital audio signal Pin itself takes, while thepulse width of the other PWM signal PB corresponds to the magnitude oftwo's complement of the quantization level the digital audio signal Pintakes.

Note that the PWM signals PA and PB shown in FIGS. 2A and 2B rise onlyat the start time point of one time cycle (reference period) TC of thePWM signals PA and PB, and falls at a time point varying correspondinglyto a level the digital audio signal Pin takes. That is, the PWM signalsPA and PB are a so-called unilateral modulation signal.

The PWM signals PA and PB may be a so-called bilateral modulation signalwhich rises and falls at time points, respectively, varyingsimultaneously as shown in FIGS. 2C and 2D.

The carrier frequency fc (=1/TC) of the PWM signals PA and PB is 16times of a sampling frequency fs of the digital audio signal Pin, and itwill be as follows when fs=48 kHz:fc=16fs=16×48 kHz=768 kHz

One of the PWM signals, PA, from the PWM circuit 11 is supplied to adrive circuit 13 where it will be inverted and not inverted to provide apair of driving pulse voltages (drive pulse) +PA and −PA as shown inFIG. 3A.

The pulse voltages +PA and −PA from the drive circuit 13 are supplied togates of switching elements, for example, a pair of n-channel MOS-FETs(metal oxide semiconductor type field effect transistor), 151 and 152,respectively.

In this example, the FETs (field effect transistor) 151 and 152 areincluded in a push-pull circuit 15 in which th FET 151 is connected atthe drain thereof to a power terminal 20 while being connected at thesource to the drain of FET 152 which is connected at the source thereofto the ground potential. The power terminal 20 is supplied with a stableDC voltage +VDD as a source voltage. It should be noted that the voltage+VDD is 20 to 50 V for example.

The source of FET 151 and drain of FET 152 are connected to a speakerterminal SP+, to which a speaker 19 is connected at one side thereof,via a low-pass filter 17 including a coil and capacitor.

The circuit construction for the other PWM signal PB from the PWMcircuit 11 is similar to that for the PWM signal PA. That is, the PWMsignal PB is supplied to the drive circuit 14 where it will be invertedand not inverted to provide a pair of driving pulse voltages (drivepulse) +PB and −PB as shown in FIG. 3B.

The pulse voltages +PB and −PB from the drive circuit 14 are supplied togates of switching elements, for example, a pair of n-channel MOS-FETs161 and 162, respectively, included in the push-pull circuit 16.

The source of FET 161 and drain of FET 162 are connected to a speakerterminal SP−, to which the speaker 19 is connected at the other sidethereof, via a low-pass filter 18 including a coil and capacitor.

Therefore, when the pulse voltage +PA is “H”, the pulse voltage −PA is“L” and FET 151 turns on while FET 152 turns off. Thus, a voltage VA atthe junction between FETs 151 and 152 is the voltage +VDD as shown inFIG. 3C. Reversely, when the pulse voltage +PA is “L”, the pulse voltage−PA is “H” and FET 151 turns off while FET 152 turns on. Thus, thevoltage VA is 0.

Similarly, when the pulse voltage +PB is “H”, the pulse voltage −PB is“L” and FET 161 turns on while FET 162 turns off. Thus, a voltage VB atthe junction between FETs 161 and 162 is the voltage +VDD as shown inFIG. 3D. Reversely, when the pulse voltage +PB is “L”, the pulse voltage−PB is “H” and FET 161 turns off while FET 162 turns on. Thus thevoltage VB is 0.

During a period for which the voltage VA is +VDD and voltage VB is 0, acurrent i will flow from the junction between FETs 151 and 152 to thejunction between FETs 161 and 162 through a line extending from thelow-pass filter 17 to the low-pass filter 18 via the speaker 19, asshown in FIGS. 1 and 3E.

Also, during a period for which the voltage VA is 0 and voltage VB is+VDD, the current i will flow reversely from the junction between FETs161 and 162 to the junction between FETs 151 and 152 through a lineextending from the low-pass filter 18 to the low-pass filter 17 via thespeaker 19. During a period for which VA=VB=+VDD and a period for whichVA=VB=0, the current i will not flow because the push-pull circuits 15and 16 form together a bright tied load (BTL) circuit.

Since the period for which the current i flows varies correspondingly toa period for which the original PWM signals PA and PB are rising and thecurrent i is integrated by the low-pass filters 17 and 18 while flowingthrough the speaker 19, so the current i flowing through the speaker 19is an analog current corresponding to the level the digital audio signalPin takes and which has been power-amplified. That is, a power-amplifiedoutput will be supplied to the speaker 19.

The circuit shown in FIG. 1 works as a power amplifier. Since FETs 151and 152, and 161 and 162, amplifies a power by switching the sourcevoltage +VDD correspondingly to the input digital audio signal Pin, sothe power amplifier can provide a large output with a high efficiency.

In the circuit constructed as shown in FIG. 1, however, if a speakercord connected at one end thereof to one of the speaker terminals SP+and SP− is put in contact with a chassis or metal piece when the speaker19 is wired to the speaker terminals SP+ and SP−, for example, with thepower amplifier kept energized, a large current will flow through eitherof the push-pull circuits 15 and 16 at the output stage shown in FIG. 1and FETs 151 and 152, and 161 and 162, included in the push-pull circuitwill possibly be damaged.

Also, if the speaker connected, by a lead wire connected to one endthereof, to the speaker terminal SP+ or SP− is put in contact, at a leadwire connected to the other end thereof, with a metallic portion, alarge current will flow through the circuit and FETs 151 and 152, and161 and 162, at the output stage included in the push-pull circuit willpossibly be damaged. At this time, the speaker will possibly be brokendown (burnt out).

To prevent the above accident, an overcurrent protection circuit isnormally provided in the above-mentioned power amplifier. FIG. 4 is acircuit diagram of a conventional power amplifier in which anovercurrent protection circuit is additionally provided.

As shown in FIG. 4, the power amplifier has an overcurrent protectioncircuit 21 provided between the output-stage push-pull circuits 15 and16 and the power terminal 20.

More specifically, In the overcurrent protection circuit 21, the powerterminal 20 is connected to the ground potential via a capacitor 211,and also via a series circuit composed of a resistor 212 and capacitor213. The power terminal 20 is connected to the emitter of an overcurrentdetection transistor 214. The junction between the resistor 212 andcapacitor 213 is connected to the drains of FETs 151 and 161, and thesource voltage +VDD is connected to the push-pull circuits 15 and 16through the resistor 212.

The junction between the resistor 212 and capacitor 213 is connected tothe base of the overcurrent detection transistor 214. This transistor214 is connected at the collected thereof to the base of a transistor215 whose emitter is connected to the ground potential. The transistor215 supplies its collector output as an overcurrent detection signal toa microcomputer 22.

When the microcomputer 22 determines, based on the supplied collectoroutput from the transistor 215, that an overcurrent has been detected,it will control the drive circuits 13 and 14 to suspend outputting thedrive signals +PA and −PA, and +PB and −PB, and also FETs 151 and 152,and 161 and 162, to always be off.

The overcurrent protection circuit 21 constructed as above functions aswill be described below. In the circuit construction shown in FIG. 4,the source voltage +VDD from the power terminal 20 is supplied to thepush-pull circuits 15 and 16 through the resistor 212.

In the normal operation of the overcurrent protection circuit 21, sincethe current i flowing through FETs 151 and 152, and 161 and 162, issmaller in value than a predetermined current and thus the voltage dropby the resistor 212 is small, so the overcurrent detection transistor214 is off.

On the other hand, when a large current flows through FETs 151 and 152,and 161 and 162, for the above reason, the resistor 212 provides a largevoltage drop and thus the overcurrent detection transistor 214 turns on.Thus, the transistor 215 also turns on, and the overcurrent detectionsignal at the collector of the transistor 215 changes from high to lowin level.

Then, since the overcurrent detection output signal is low in level, themicrocomputer 22 supplies a control signal to the drive circuits 13 and14 which will be caused by the control signal to suspend providingoutputs. More specifically, receiving the control signal, the drivecircuits 13 and 14 will suspend supplying the drive signals +PA and −PA,and +PB and −PB, to FETS 151 and 152, and 161 and 162. Thus, FETS 151and 152 and 161 and 162 are all turned off, and no overcurrent willflow. Therefore, FETS 151 and 152, and 161 and 162, and the speaker 19are protected.

Note that when the speaker 19 is connected to the speaker terminals SP+and SP− and it is PWM-driven, the power amplifier will provide an outputof more than several to 100 W.

In the aforementioned detection circuit construction, the source voltage+VDD is supplied to the push-pull circuits 15 and 16 through theovercurrent detection resistor 212. In the normal mode of operation, acurrent corresponding to an audio signal current i flowing to thespeaker 19 flows through the resistor 212, so that the source voltage(voltage at the drains of FETS 151 and 161) of the push-pull circuits 15and 16 will vary.

Thus, the circuit construction shown in FIG. 4 cannot provide minimumand maximum power amplifier outputs at a desired ratio.

DISCLOSURE OF THE INVENTION

It is therefore an object of the present invention to overcome theabove-mentioned drawbacks of the related art by providing an improvedand novel power amplifier.

The above object can be attained by providing a power amplifierincluding according to the present invention a first amplificationcircuit connected at an output terminal thereof to one end of a load andwhich makes noninverting-amplification of an input signal, a secondamplification circuit connected at an output terminal thereof to theother end of the load and which makes inverting-amplification of aninput signal, deviation detecting means for detecting a deviationbetween potentials at the output terminals of the first and secondamplification circuits, and operation stopping means which worksaccording to a detection output from the deviation detecting means tostop the first and second amplification circuits from operating.

In the normal mode of operation of the above power amplifier accordingto the present invention, both the potential at the output terminal ofthe first amplification circuit, to which the load is connected at oneend thereof, and that at the output terminal of the second amplificationcircuit, to which the load is connected at the other end thereof, are ahalf of the source voltage.

On the other hand, if a speaker cord connected at one end thereof to oneof speaker terminals is put in contact with a chassis or metal piecewhen a speaker is wired to the speaker terminals, for example, with thepower amplifier kept energized, a large current will flow through anamplification element in the amplification circuit whose output terminalis the speaker terminal to which the speaker cord is connected and thepotential at the output terminal of that amplification circuit falls.

Thus, the neutral potential at the output terminal of one of theamplification circuits deviates from that at the output terminal of theother amplification circuit, and the deviation is detected by thedeviation detecting means. The operation stopping means substantiallystops, on the basis the detection output from the deviation detectingmeans, the amplification circuit from operating. Thus, the amplificationelement in the amplification circuit and the load are protected.

The above amplification circuits may be a pulse width modulation (PWM)signal-driven switching amplifier. In this case, the above firstamplification circuit includes a first pulse width modulation means forconverting an input signal into a first pulse width modulation signalwhose quantization level corresponds to its pulse width, a first drivingmeans for converting a first pulse width modulation signal output fromthe first pulse width modulation means into a first pair of drive pulseswhose levels are opposite to each other, and a first push-pull circuitformed from a first pair of switching elements pushpull-connected toeach other, the first pair of switching elements being supplied with thefirst pair of drive pulses from the first driving means, and the firstpush-pull circuit being connected at the output terminal thereof to oneend of a load. Also, the second amplification circuit includes a secondpulse width modulation means for converting an input signal into asecond pulse width modulation signal whose two's complement ofquantization level corresponds to its pulse width, a second drivingmeans for converting a second pulse width modulation signal output fromthe second pulse width modulation means into a second pair of drivepulses whose levels are opposite to each other, and a second push-pullcircuit formed from a second pair of switching elementspushpull-connected to each other, the second pair of switching elementsbeing supplied with the second pair of drive pulses from the seconddriving means, and the second push-pull circuit being connected at theoutput terminal thereof to the other end of a load. The deviationdetecting means detects a deviation between potentials at the outputterminals of the first and second push-pull circuits, respectively.

Also in this case, if one of the speaker terminals is put in contactwith a chassis or metal piece when a speaker is wired to the speakerterminals, for example, with the power amplifier kept energized, a largecurrent will flow through a switching element in the push-pull circuitwhose output terminal is a grounded speaker terminal and the potentialat the output terminal of that push-pull circuit falls.

Thus, the neutral potential at the output terminal of one of thepush-pull circuits deviates from that at the output terminal of theother push-pull circuit, and the deviation is detected by the deviationdetecting means. The operation stopping means substantially stops, onthe basis the detection output from the deviation detecting means, thepush-pull circuit from operating. Thus, the switching elements in thepush-pull circuit and the load are protected.

Also the above object can be attained by providing a power amplifierincluding according to the present invention a first amplificationcircuit connected at an output terminal thereof to one end of a load andwhich makes noninverting-amplification of an input signal, a secondamplification circuit connected at an output terminal thereof to theother end of the load and which makes inverting-amplification of aninput signal, a deviation detecting means for detecting a deviationbetween potentials at the output terminals of the first and secondamplification circuits, respectively, and a disconnecting means whichworks according to a detection output from the deviation detecting meansto disconnect the load from the output terminal.

Also in this power amplifier, a deviation between the neutral potentialsat the output terminals of the first and second amplification circuits,respectively, is detected by the deviation detecting means. Theoperation stopping means disconnects, on the basis the detection outputfrom the deviation detecting means, the load from the output terminalsof the first and second amplification circuits. Thus, the amplificationelement in the amplification circuit and the load are protected.

These objects and other objects, features and advantages of the presentinvention will become more apparent from the following detaileddescription of the preferred embodiments of the present invention whentaken in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a circuit diagram of the PWM-driven power amplifier, showingan example construction of the latter;

FIGS. 2A and 2B explain together the operation of the power amplifiershown in FIG. 1;

FIGS. 3A to 3F also explain together the operation of the poweramplifier shown in FIG. 1;

FIG. 4 is a circuit diagram of the power amplifier including theovercurrent protection circuit;

FIG. 5 is a circuit diagram of one embodiment of the power amplifieraccording to the present invention;

FIG. 6 is a circuit diagram of another embodiment of the power amplifieraccording to the present invention;

FIG. 7 is a circuit diagram of a variant of the overcurrent detectioncircuit used in the power amplifier according to the present invention;and

FIG. 8 is a block diagram of a still another embodiment of the poweramplifier according to the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION

The present invention will be described concerning embodiments in whichthe present invention is applied in the aforementioned digital audiosignal power amplifier.

FIG. 5 is a circuit diagram of the power amplifier according to thepresent invention, showing the construction of the latter. ThePWM-driven circuit part except for the overcurrent detection circuitpart is quite the same as in FIG. 1.

In the power amplifier according to the present invention, a sourcevoltage +VDD from a power terminal 20 is supplied, not via any resistorbut directly, to push-pull circuits 15 and 16, differently from theconventional power amplifier having been described with reference toFIG. 4.

As shown, the overcurrent detection circuit, generally indicated with areference 30, included in the power amplifier according to the presentinvention includes push-pull circuits 15 and 16 and a series circuitfrom resistors 31, 32 and 33 connected between a junction TP 15 betweenthe source of FET 151 and drain of FET 152, which is an output terminalof the push-pull circuit 15, and a junction TP16 between the source ofFET 161 and drain of FET 162, which is an output terminal of thepush-pull circuit 16. Also, it includes a capacitor 34 connected inparallel with the central resistor 32. The capacitor 34 is provided toallow the overcurrent detection circuit 30 to operate with only a lowfrequency component.

The junction between the resistors 31 and 32 is connected to the emitterof a PNP transistor 35, and to the base of a PNP transistor 36 as well.The junction between the resistors 32 and 33 is connected to the base ofthe PNP transistor 35 and also to the emitter of the PNP transistor 36.The PNP transistors 35 and 36 are connected at the collectors thereof toeach other, and the junction between the collectors is connected to thebase of a transistor 37. The transistor 37 is connected at the emitterthereof to a ground potential, and an overcurrent detection outputdeveloped at the collector of the transistor 37 is supplied to amicrocomputer 22.

In the normal mode of operation of the power amplifier constructed asabove, both the potentials at the junctions TP15 and TP16 are a half ofthe source voltage, namely, +VDD/2, and the PWM-driven circuit partoperates in quire the same manner as having been described above withreference of FIG. 4. At this time, since the potentials at the junctionsTP15 and TP16 are the source-voltage half, no current flows through theovercurrent detection circuit 30 and the transistors 35 and 36 are bothoff and the transistor 37 is also off.

In this case, the push-pull circuits 15 and 16 are supplied directlywith the source voltage +VDD from the power terminal 20, not as in theconventional power amplifier shown in FIG. 4, and so the reproducedsound from a speaker 19 will not incur such a level variation as in theconventional power amplifier shown in FIG. 4 and the sound quality notbe degraded.

When a speaker terminal SP− is grounded for the aforementioned reasonwith the power amplifier shown in FIG. 5 being energized, the potentialat the output terminal of the push-pull circuit 16, that is, thepotential at the junction TP16, will be lower than the half of thesource voltage.

Then, a current will flow from the junction TP15 toward the junctionTP16, and the transistor 35 will turn on because of a voltage drop bythe resistor 32. Thus, the transistor 37 will turn on and an overcurrentbe detected. The overcurrent detection output is supplied to themicrocomputer 22.

Based on the supplied overcurrent detection output, the microcomputer 22controls the drive circuits 13 and 14 to get into an non-operating stateand turn off all FETs 151 and 152, and 161 and 162, in the push-pullcircuits 15 and 16. Thus, no overcurrent will flow through the push-pullcircuit 16, so that FETs 161 and 162 will be protected and also thespeaker 19, if connected as a load, be protected.

If the speaker terminal SP+ is grounded for the aforementioned reasonwith the power amplifier shown in FIG. 5 being energized, the potentialat the output terminal of the push-pull circuit 15, that is, thepotential at the junction TP15, will be lower than the half of thesource voltage.

Then, a current will flow from the junction TP16 toward the junctionTP15, and the transistor 36 will turn on because of a voltage drop bythe resistor 32. Thus, the transistor 37 will turn on and an overcurrentbe detected. The overcurrent detection output is supplied to themicrocomputer 22.

Based on the supplied overcurrent detection output, the microcomputer 22controls the drive circuits 13 and 14 to get into an non-operating stateand turn off all FETs 151 and 152, and 161 and 162, in the push-pullcircuits 15 and 16. Thus, no overcurrent will flow through the push-pullcircuit 15, so that FETs 151 and 152 will be protected and also thespeaker 19, if connected as a load, be protected.

As above, the overcurrent detection circuit 30 in the power amplifieraccording to the present invention protects FETs 151 and 152, and 161and 162, as switching elements included in the push-pull circuits andthe speaker as a load against an overcurrent, and assures to provideminimum and maximum power amplifier outputs at a designed ratio.

Note that in the above embodiment, the microcomputer 22 controls, basedon the overcurrent detection output, the operation of the drive circuits13 and 14 but it may be adapted to control, based on the overcurrentdetection output, the PWM circuit 11 to stop outputting PWM signals PAand PB.

Also, the microcomputer 22 may be adapted to cut off power supply to thePWM circuit 11, drive circuits 13 and 14 and push-pull circuits 15 and16 on the basis of the overcurrent detection output in order tosubstantially disenable the PWM circuit 11 and drive circuits 13 and 14.

Also, as shown in FIG. 6, output cut-off switch circuits 41 and 42 whichare normally on may be provided between the speaker terminal SP+ and afilter 17 and between the speaker terminal SP− and a filter 18,respectively, so that the microcomputer 22 will work, based on theovercurrent detection output, to turn off the switch circuits 41 and 42when an overcurrent is detected. The reason why the switch circuits 41and 42 are thus provided is that when the switch circuits 41 and 42 areturned off, the load is disconnected from the output terminal, whereby acurrent route causing a trouble will be broken.

In the overcurrent detection circuit 30 in the power amplifier accordingto the present invention, an overcurrent is detected with the use of oneof the three resistors connected in series between the output terminals(junctions TP15 and TP16) of the push-pull circuits 15 and 16. Ofcourse, however, the overcurrent detection circuit can be formed from asingle resistor for example because it suffices to detect a potentialchange between the output terminals. Alternatively, the overcurrentdetection circuit may be a circuit which can detect a deviation betweenpotentials on the output terminals.

The aforementioned overcurrent detection circuit 30 is designed suchthat when the potential on any of the junctions TP15 and TP16 deviatesfrom the half of the source voltage, all FETs 151 and 152, and 161 and162, in the push-pull circuits 15 and 16 are turned off. However, thisovercurrent detection may be accomplished by detecting a deviationbetween potentials on the junctions TP15 and TP16 to judge through whichof the push-pull circuits an overcurrent has flowed, and turning offFETs in only the push-pull circuit determined to have had theovercurrent flowed therethrough, as shown in FIG. 7. More specifically,when the potential at the junction TP16 is lower than the half of thesource voltage, the transistor 35 turns on because of a voltage drop bythe resistor 32 through which a current flows from the junction TP15toward the junction TP16, so a transistor 39 turns on, an overcurrentthrough the junction TP16 is detected, and an overcurrent detectionoutput is supplied to the microcomputer 22. On the basis of the suppliedovercurrent detection output, the microcomputer 22 will turn off FETs161 and 162 in the push-pull circuit 16. On the contrary, when thepotential at the junction TP15 is lower than the half of the sourcevoltage, the transistor 36 turns on because of a voltage drop by theresistor 32 through which a current flows from the junction TP16 towardthe junction TP15, so a transistor 38 turns on, an overcurrent throughthe junction TP15 is detected, and an overcurrent detection output issupplied to the microcomputer 22. On the basis of the suppliedovercurrent detection output, the microcomputer 22 will turn off FETs151 and 152 in the push-pull circuit 15. Also in this case, themicrocomputer 22 may of course be adapted to turn off all FETs 151 and152, and 161 and 162, in the push-pull circuits 15 and 16 when suppliedwith an overcurrent detection output from any of the above overcurrentdetection outputs.

Also in the above power amplifier, the overcurrent detection circuit 30is connected between the output terminals of the push-pull circuits 15and 16, but it may be connected between output terminals of low-passfilters 17 and 18, that is, between the speaker terminals SP+ and SP−.In this case, an output as an analog signal is provided at the outputterminals of the low-pass filters 17 and 18. So, the time constant bythe overcurrent detection resistor 32 and parallel capacitor 34 in theovercurrent detection circuit 30 has to be large.

Note that the above power amplifier has been described concerning anexample in which the input signal Pin is a digital audio signal but theinput signal may be an analog audio signal. Also, the PWM circuit 11 anddrive circuits 13 and 14 may be formed integrally with each other.Further, the PWM circuit 11 and drive circuits 13 and 14 can of coursebe constructed as a hardware, and also each PWM signal may be producedby a software process executable by a digital signal processor (DSP) ormicrocomputer.

The power amplifier has been explained concerning a one using thepush-pull circuits 15 and 16, but each of the push-pull circuits may beformed to have a single-end construction using a single switchingelement. In this case, each of FETs 152 and 162 may be replaced with aresistor, for example. In this case, the drive circuits 13 and 14 arenot required.

Further, the present invention is applicable to a power amplificationcircuit which is an analog circuit. FIG. 8 shows a power amplifierhaving the so-called BTL type construction by way of example. As shown,in the power amplifier, an analog audio signal Sin is supplied at aninput terminal Tin, it is power-amplified by anoninverting-amplification circuit 51, and supplied to a speakerterminal SP+ to which the speaker 19 is connected at one end thereof viathe switch circuit 41. On the other hand, the analog audio signal Sin issupplied to the noninverting amplification circuit 52 via an inverter53. It is power-amplified by the power amplification circuit 52, andsupplied to the speaker terminal SP− to which the speaker 19 isconnected at the other end thereof via the switch circuit 42. Theinverter 53 and noninverting amplification circuit 52 form together anoninverting power amplifier. Note that each of the power amplificationcircuits 51 and 52 is supplied at a power terminal 20 thereof with onlya positive-pole DC voltage +VDD as a source voltage, for example, thatis, it is supplied with a single power and the potential at the outputterminal thereof is a half of the source voltage, namely, +VDD/2. Alsoin the power amplifier, an overcurrent detection circuit 30 is connectedbetween the output terminals of the power amplification circuits,namely, between junctions TP51 and TP52. When the speaker terminal SP+or SP− is grounded, an overcurrent is detected as in the aforementionedembodiments, and the microcomputer 22 provides a control to protect thepower amplification circuits 51 and 52. As shown in FIG. 8, themicrocomputer 22 turns off the switch circuits 41 and 42.

In the above, the present invention has been described concerning theaudio amplifier. However, the present invention may be applied to anamplifier for driving a power apparatus such as a motor. Also, the poweramplifier can supply an operating voltage to a load connected thereto inplace of the speaker 19, and the voltage applied to the load can bechanged in magnitude by changing the input signal Pin.

Note that in the aforementioned embodiments, the overcurrent detectionoutput from the overcurrent detection circuit is supplied to themicrocomputer which will disconnect the load, control the drive circuitsand PWM circuit and control the power supply to each circuit but adedicated control circuit, not the microcomputer, may separately beprovided to make such kinds of control.

In the foregoing, the present invention has been described in detailconcerning certain preferred embodiments thereof as examples withreference to the accompanying drawings. However, it should be understoodby those ordinarily skilled in the art that the present invention is notlimited to the embodiments but can be modified in various manners,constructed alternatively or embodied in various other forms withoutdeparting from the scope and spirit thereof as set forth and defined inthe appended claims.

INDUSTRIAL APPLICABILITY

As having been described in the foregoing, the present invention canovercome the drawbacks of the related art that minimum and maximum poweramplifier outputs cannot be provided at a desired ratio and thus protectthe switching circuits in the push-pull circuits and the load when anovercurrent flows.

1. A power amplifier comprising: a first amplification circuit connectedat an output terminal thereof to one end of a load and for makingnoninverting-amplification of an input signal; a second amplificationcircuit connected at an output terminal thereof to the other end of theload and for making inverting-amplification of an input signal;deviation detecting means for detecting a deviation between potentialsat the output terminals of the first and second amplification circuits;and operation stopping means which works according to a detection outputfrom the deviation detecting means to stop the first and secondamplification circuits from operating.
 2. The apparatus as set forth inclaim 1, wherein the first amplification circuit includes: first pulsewidth modulation means for converting the input signal into a firstpulse width modulation signal whose pulse width corresponds toquantization level of the input signal; and a first switching circuitfor performing a switching operation, according to a drive pulse fromthe first pulse width modulation means, wherein the output terminalthereof is connected to one end of the load; and the secondamplification circuit includes: second pulse width modulation means forconverting the input signal into a second pulse width modulation signalwhose pulse width corresponds to two's complement of quantization levelof the input signal; and a second switching circuit for performing aswitching operation, according to a drive pulse from the second pulsewidth modulation means, wherein the output terminal thereof is connectedto the other end of the load.
 3. The apparatus as set forth in claim 2,wherein the operation stopping means stops, based on the deviationdetection output from the deviation detecting means, supplying a sourcevoltage to at least any one of the first and second pulse widthmodulation means, and first and second switching circuits.
 4. Theapparatus as set forth in claim 2, wherein the operation stopping meansstops, based on the deviation detection output from the deviationdetecting means, the first and/or second pulse width modulation meansfrom outputting a pulse width modulation signal.
 5. The apparatus as setforth in claim 1, wherein: the first amplification circuit includes:first pulse width modulation means for converting the input signal intoa first pulse width modulation signal whose pulse width corresponds toquantization level of the input signal; first driving means forconverting the first pulse width modulation signal output from the firstpulse width modulation means into a first pair of drive pulses whoselevels are opposite to each other; and a first push-pull circuit formedfrom a first pair of switching elements pushpull-connected to eachother, the first pair of switching elements being supplied with thefirst pair of drive pulses from the first driving means, and the firstpush-pull circuit being connected at the output terminal thereof to oneend of a load; and the second amplification circuit includes: secondpulse width modulation means for converting the input signal into asecond pulse width modulation signal whose pulse width corresponds totwo's complement of quantization level of the input signal; seconddriving means for converting the second pulse width modulation signaloutput from the second pulse width modulation means into a second pairof drive pulses whose levels are opposite to each other; and a secondpush-pull circuit formed from a second pair of switching elementspushpull-connected to each other, the second pair of switching elementsbeing supplied with the second pair of drive pulses from the seconddriving means, and the second push-pull circuit being connected at theoutput terminal thereof to the other end of a load.
 6. The apparatus asset forth in claim 5, wherein the operation stopping means stops, basedon the deviation detection output from the deviation detecting means,supplying a source voltage to the first and/or second pulse widthmodulation means.
 7. The apparatus as set forth in claim 5, wherein theoperation stopping means stops, based on the deviation detection outputfrom the deviation detecting means, the first and/or second pulse widthmodulation means from outputting the pulse width modulation signal. 8.The apparatus as set forth in claim 5, wherein the operation stoppingmeans stops, based on the deviation detection output from the deviationdetecting means, the first and/or second driving means from outputtingthe pair of drive pulses.
 9. The apparatus as set forth in claim 1,wherein the operation stopping means stops, based on the deviationdetection output from the deviation detecting means, supplying a sourcevoltage to the first and/or amplification circuit.
 10. A power amplifiercomprising: a first amplification circuit connected at an outputterminal thereof to one end of a load and for makingnoninverting-amplification of an input signal; a second amplificationcircuit connected at an output terminal thereof to the other end of theload and for making inverting-amplification of an input signal;deviation detecting means for detecting a deviation between potentialsat the output terminals of the first and second amplification circuits;and disconnecting means for working according to a detection output fromthe deviation detecting means to disconnect the load from the outputterminal.
 11. The apparatus as set forth in claim 10, wherein: the firstamplification circuit includes: first pulse width modulation means forconverting the input signal into a first pulse width modulation signalwhose pulse width corresponds to quantization level of the input signal;and a first switching circuit for performing a switching operation,according to a drive pulse from the first pulse width modulation means,wherein the output terminal thereof is connected to one end of the load;and the second amplification circuit includes: second pulse widthmodulation means for converting the input signal into a second pulsewidth modulation signal whose pulse width corresponds to two'scomplement of quantization level of the input signal; and a secondswitching circuit for performing a switching operation, according to adrive pulse from the second pulse width modulation means, wherein theoutput terminal thereof is connected to the other end of the load. 12.The apparatus as set forth in claim 10, wherein: the first amplificationcircuit includes: first pulse width modulation means for converting theinput signal into a first pulse width modulation signal whose pulsewidth corresponds to quantization level of the input signal; firstdriving means for converting the first pulse width modulation signaloutput from the first pulse width modulation means into a first pair ofdrive pulses whose levels are opposite to each other; and a firstpush-pull circuit formed from a first pair of switching elementspushpull-connected to each other, the first pair of switching elementsbeing supplied with the first pair of drive pulses from the firstdriving means, and the first push-pull circuit being connected at theoutput terminal thereof to one end of a load; and the secondamplification circuit includes: second pulse width modulation means forconverting the input signal into a second pulse width modulation signalwhose pulse width corresponds to two's complement of quantization levelof the input signal; second driving means for converting the secondpulse width modulation signal output from the second pulse widthmodulation means into a second pair of drive pulses whose levels areopposite to each other; and a second push-pull circuit formed from asecond pair of switching elements pushpull-connected to each other, thesecond pair of switching elements being supplied with the second pair ofdrive pulses from the second driving means, and the second push-pullcircuit being connected at the output terminal thereof to the other endof a load.